Volume 2, Issue 2

Implementation of Cryptography Core

Author

M. Santhosh Kumar *and B.Vijaya Bhaskar

Abstract

Abstract:

The continuous increase in demand for security in electronic systems and communication systems which lacks a secure architecture has resulted in the need to provide cryptography architecture with high secure core. The hardware implementation of the cryptography core which incorporates multiple algorithm for security purpose was already developed but if the architecture is capable of switching between the algorithms used for encryption /decryption as controlled by the host computer dynamically, then the security over the data path will be increased by making the attempt for hacking too difficult. The switching between heterogeneous algorithms will also increase the confusion level. This proposed architecture implements three symmetric algorithms namely the standard AES, standard DES and proposed modified DES (MMDV) algorithms. Representing these algorithms in the functional block level and also using the new concept of common S-Box , results in operations that are common to all the three algorithms, allows us to merge them in a single architecture and thus there is an area reduction of 14.5% in cryptography core with 2 S-Boxes rather than using 11 S-Box. The operation of this cryptography core is controlled by the control signals, selecting which algorithm to work at time, making it difficult to hack the information transferred through the data line

DOI

https://doi.org/10.62226/ijarst20130269

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